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LiteX SoC with Microwatt on VCU-118

PowerPC Support in LiteX Framework

Overview

Integration of Microwatt PowerPC core into the LiteX SoC framework, enabling Linux boot through LiteX’s infrastructure. This required fixing numerous RISC-V assumptions in LiteX.

Platform: Xilinx VCU-118
Framework: LiteX
CPU: Microwatt PowerPC


Task: PowerPC Boot Support in LiteX

Objective

Adapt LiteX SoC and BIOS to boot PowerPC Linux, fixing RISC-V assumptions throughout the codebase.

Implementation

Key fixes for PowerPC compatibility:

Endianness handling - PowerPC is big-endian:

// Fixed MMIO access for PowerPC
#ifdef __powerpc__
#define readl(addr) __builtin_bswap32(*(uint32_t *)(addr))
#define writel(val, addr) *(uint32_t *)(addr) = __builtin_bswap32(val)
#endif

Boot protocol - PowerPC uses function descriptors:

// Correct Linux entry for PowerPC
typedef struct {
    void *entry;
    void *toc;
} func_desc_t;

func_desc_t *desc = (func_desc_t *)KERNEL_ADDR;
void (*kernel_entry)(void) = desc->entry;

Memory layout - Fixed for PowerPC requirements:

  • Kernel at 0x400000 (not RISC-V’s 0x40000000)
  • Exception vectors at 0x0
  • Device tree at 0xf00000
# Build and boot Linux
./build_kernel.sh
litex_term /dev/ttyUSB1 --kernel=linux.bin --kernel-adr=0x400000

[Screenshot placeholder: Linux boot messages on serial console]

Running Linux on LiteX/Microwatt

# Build LiteX SoC with Microwatt
[LiteX build command placeholder]

# Build Linux kernel for PowerPC
[Kernel build command placeholder]

# Build device tree
[DTB build command placeholder]

# Program FPGA with complete SoC
[FPGA programming placeholder]

# Boot Linux via serial terminal
[Linux serial boot command placeholder]

# Alternative: Boot from SPI flash
[SPI flash boot command placeholder]

Boot Performance

LiteX BIOS on Microwatt/VCU-118
CPU:    100MHz
RAM:    256MB
Kernel: 2.3MB loaded
Boot:   45 seconds to prompt

Bugs Fixed

  • Wrong entry point handling for PowerPC
  • Endianness issues in all MMIO access
  • Memory barriers for PowerPC architecture
  • Cache management operations
  • Exception vector locations

Code: codeberg.org/PowerCommons/litex-powerpc