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Work Stream - User Mode Instructions

Owner: TBD Duration: 12-16 weeks Priority: High

💬 Discuss WS1: Join #powercommons:matrix.org to discuss instruction implementation, bit manipulation strategies, and decoder modifications.

Objectives

Implement new user-mode instructions added since v2.06 and remove/relocate deprecated instructions.

Deliverables

  1. RTL for 40+ new instructions
  2. Decoder updates for new instruction encodings
  3. Test cases for all new instructions
  4. Removal/sandboxing of deprecated instructions

Roadmap

Phase 1: Analysis & Planning (Weeks 1-2)

  • Review ISA specifications for all new instructions
  • Identify decoder modifications needed
  • Plan execution unit assignments

Phase 2: Basic Arithmetic/Logic (Weeks 3-5)

  • Implement bit manipulation instructions
  • Implement count/byte operations

Phase 3: Load/Store Extensions (Weeks 6-8)

  • Implement quadword atomics
  • Implement new synchronization

Phase 4: Floating Point (Weeks 9-11)

  • Implement FP control instructions
  • Implement FP merge operations

Phase 5: Cleanup & Verification (Weeks 12-16)

  • Remove deprecated instructions
  • Integration testing
  • Performance validation

Dependencies

  • Decoder infrastructure
  • Execution unit availability
  • Test framework

Risks

  1. Timing closure for complex bit manipulation instructions
  2. Integration conflicts with existing instructions
  3. Test coverage gaps

Success Criteria

  • All 40+ new instructions functional
  • All deprecated instructions removed/sandboxed
  • 100% instruction decode coverage
  • Pass ISA compliance tests for Book I
  • No timing degradation

Issues

Status: 45 open, 0 closed (0/45 complete)

#TitleCategoryTagsStatusPriorityAssignee
#442Implement brd instructionInstructionbit-manipulation, instruction⬜ Open🟡 Medium-
#443Implement brw instructionInstructionbit-manipulation, instruction⬜ Open🟡 Medium-
#444Implement brh instructionInstructionbit-manipulation, instruction⬜ Open🟡 Medium-
#445Implement cfuged instructionInstructionbit-manipulation, instruction⬜ Open🟡 Medium-
#446Implement pdepd instructionInstructionbit-manipulation, instruction⬜ Open🟡 Medium-
#447Implement pextd instructionInstructionbit-manipulation, instruction⬜ Open🟡 Medium-
#448Implement cntlzdm instructionInstructioncount-ops, instruction⬜ Open🟡 Medium-
#449Implement cnttzdm instructionInstructioncount-ops, instruction⬜ Open🟡 Medium-
#450Implement cnttzd instructionInstructioncount-ops, instruction⬜ Open🟡 Medium-
#451Implement cnttzw instructionInstructioncount-ops, instruction⬜ Open🟡 Medium-
#452Implement setbr, setbcr, setnbc, setnbcr instructionsInstructioncompare, instruction⬜ Open🟡 Medium-
#453Implement setb instructionInstructioncompare, instruction⬜ Open🟡 Medium-
#454Implement cmpeqb instructionInstructioncompare, instruction⬜ Open🟡 Medium-
#455Implement cmprb instructionInstructioncompare, instruction⬜ Open🟡 Medium-
#456Implement addex instructionInstructionarithmetic, instruction⬜ Open🟡 Medium-
#457Implement maddld instructionInstructionarithmetic, instruction⬜ Open🟡 Medium-
#458Implement maddhd instructionInstructionarithmetic, instruction⬜ Open🟡 Medium-
#459Implement maddhdu instructionInstructionarithmetic, instruction⬜ Open🟡 Medium-
#460Implement modulo instructions (modsd, modsw, modud, moduw)Instructionarithmetic, instruction⬜ Open🟡 Medium-
#461Implement extswsli instructionInstructionarithmetic, instruction⬜ Open🟢 Low-
#462Implement lq instructionInstructionatomic, instruction, load-store⬜ Open🟠 High-
#463Implement stq instructionInstructionatomic, instruction, load-store⬜ Open🟠 High-
#464Implement lqarx instructionInstructionatomic, instruction, load-store⬜ Open🟠 High-
#465Implement stqcx instructionInstructionatomic, instruction, load-store⬜ Open🟠 High-
#466Implement scv instructionInstructioninstruction, system-call⬜ Open🟠 High-
#467Implement bctar instructionInstructionbranch, instruction⬜ Open🟡 Medium-
#468Implement darn instructionInstructioninstruction, random⬜ Open🟡 Medium-
#469Implement addpcis instructionInstructionaddress, instruction⬜ Open🟢 Low-
#470Implement mcrxrx instructionInstructioninstruction, register⬜ Open🟢 Low-
#471Implement icbt instructionInstructioncache-hint, instruction⬜ Open🟢 Low-
#472Implement FP control instructions (mffscdrn, mffscdrni, mffsce, etc.)Instructionfloating-point, instruction⬜ Open🟡 Medium-
#473Implement fmrgew and fmrgow instructionsInstructionfloating-point, instruction⬜ Open🟡 Medium-
#474Implement hashst instructionInstructionhash, instruction⬜ Open🟢 Low-
#475Implement hashchk instructionInstructionhash, instruction⬜ Open🟢 Low-
#476Remove/sandbox dcba instructionCleanupcleanup, deprecated⬜ Open🟡 Medium-
#477Remove/sandbox cache touch instructions (dcblc, dcbtls, dcbtsls, icblc, icbtls)Cleanupcleanup, deprecated⬜ Open🟡 Medium-
#478Remove icswx instructionCleanupcleanup, deprecated⬜ Open🟡 Medium-
#479Remove ldawx, wchkall, wclr instructionsCleanupcleanup, deprecated⬜ Open🟡 Medium-
#480Replace mbar with eieioCleanupcleanup, deprecated, synchronization⬜ Open🟠 High-
#481Remove mfdcrux and mtdcrux instructionsCleanupcleanup, deprecated⬜ Open🟡 Medium-
#482Remove makeitso, replace with misoCleanupcleanup, deprecated⬜ Open🟡 Medium-
#483Remove/relocate SPRG4-7 registersCleanupcleanup, deprecated, registers⬜ Open🟡 Medium-
#484Update instruction decoder for all new instructionsDecoderdecoder, integration⬜ Open🟠 High-
#485Create comprehensive instruction test suiteVerificationtesting, verification⬜ Open🟠 High-
#486Performance validation of new instructionsPerformanceperformance, verification⬜ Open🟡 Medium-

Last updated: 2025-12-05 16:48:17