First Bitstream Build

Step-by-step guide to synthesize and program Microwatt on FPGA.

Choose Your Path

Option A: Microwatt Native Build (FuseSoC)

Best for: Understanding Microwatt internals, VHDL development

Option B: LiteX SoC Build

Best for: Quick SoC prototyping, adding peripherals

Option A: Microwatt Native Build

1. Install FuseSoC

pip3 install --user fusesoc

2. Clone Microwatt

git clone https://github.com/antonblanchard/microwatt
cd microwatt

Or PowerCommons VCU-118 fork:

git clone https://codeberg.org/PowerCommons/microwatt-vcu118
cd microwatt-vcu118

3. Build Hello World

make -C hello_world

Output: hello_world/hello_world.hex

4. Synthesize for FPGA

For Arty A7:

fusesoc run --target=arty_a7-100 microwatt --memory_size=16384 --ram_init_file=hello_world/hello_world.hex

For VCU-118 (PowerCommons fork):

fusesoc run --target=vcu118 microwatt

Build time: 30-60 minutes

Output: build/microwatt_*/arty_a7-100-vivado/microwatt_*.bit

5. Program FPGA

openocd -f board/arty_a7.cfg -c "init; pld load 0 microwatt.bit; exit"

Or with Vivado:

vivado -mode batch -source program.tcl

6. Connect Serial Console

screen /dev/ttyUSB1 115200

Press reset. You should see:

Hello World

Option B: LiteX SoC Build

1. Build SoC

For VCU-118:

cd ~/litex/litex-boards/litex_boards/targets
python3 vcu118.py \
    --cpu-type=microwatt \
    --sys-clk-freq=100e6 \
    --with-ethernet \
    --build \
    --load

For Arty A7:

python3 arty.py \
    --cpu-type=vexriscv \
    --with-ethernet \
    --build \
    --load

Build time: 15-40 minutes

2. Console Access

LiteX provides litex_term:

litex_term /dev/ttyUSB1

Expected:

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

LiteX SoC on VCU118

Build Optimization

Faster Synthesis

Use Vivado’s performance settings:

set_param general.maxThreads 8

Or in LiteX:

python3 vcu118.py --cpu-type=microwatt --vivado-synth-directive PerformanceOptimized

Verify Build Success

Check Resource Utilization

Open in Vivado:

vivado build/*/microwatt.xpr

Navigate to: Reports → Utilization

Expected for Microwatt on Arty A7:

• LUTs: ~5,000 (5%)
• FFs: ~3,000 (3%)
• BRAM: 20 (30%)

Expected for Microwatt on VCU-118:

• LUTs: ~8,000 (<1%)
• FFs: ~5,000 (<1%)
• BRAM: 40 (3%)
• Plenty of room for expansion!

Check Timing

cat build/*/microwatt.runs/impl_1/*_timing_summary.txt | grep "WNS"

WNS (Worst Negative Slack) should be positive:

WNS: 2.341 ns

If negative, design won’t meet timing. Reduce clock frequency.

Troubleshooting Build Errors

“Vivado not found”

source /opt/Xilinx/Vivado/2025.1/settings64.sh

Synthesis fails with timing errors

• Reduce --sys-clk-freq
• Add timing constraints
• Check Troubleshooting

“Memory file not found” Ensure hello_world.hex exists:

make -C hello_world
ls -l hello_world/hello_world.hex

Out of memory during build Increase swap or reduce threads:

export MAKEFLAGS="-j2"

Next Steps

Boot Linux

See Microwatt LiteX Integration for Linux boot.

Add Custom Logic

Modify VHDL in microwatt/:

• core.vhdl - CPU core
• soc.vhdl - SoC wrapper
• fpga/*.vhdl - Board-specific

Modify SoC Configuration

LiteX allows Python-based SoC building:

from litex_boards.targets.vcu118 import BaseSoC

class MySoC(BaseSoC):
    def __init__(self):
        super().__init__(cpu_type="microwatt")
        # Add custom peripherals
        self.add_custom_peripheral()

Build Time Reference

Congratulations! You’ve built your first OpenPower bitstream.