University of Oregon FPGA Systems

Remote access to FPGA development boards hosted at University of Oregon.

Available Systems

Access Setup

1. VPN Configuration

After receiving credentials, configure OpenVPN:

Linux/WSL:

sudo apt install -y openvpn
sudo openvpn --config powercommons-uo.ovpn

Windows: Download OpenVPN GUI and import powercommons-uo.ovpn

2. SSH Access

ssh [email protected]

First time:

# Add SSH key to server
ssh-copy-id [email protected]

Programming FPGAs

Method 1: Vivado Hardware Server

On remote system:

# Start hardware server (if not running)
hw_server -s TCP:3121

On your local machine:

# In Vivado TCL console
connect_hw_server -url fpga-dev-01.uo.powercommons.org:3121
open_hw_target
program_hw_devices [get_hw_devices xcvu9p_0] -file microwatt.bit

Method 2: OpenOCD (SSH tunnel)

Local machine:

# Create SSH tunnel
ssh -L 3121:localhost:3121 fpga-dev-01.uo.powercommons.org

# In another terminal
openocd -f remote_vcu118.cfg -c "init; pld load 0 microwatt.bit; exit"

Serial Console Access

Via SSH

ssh fpga-dev-01.uo.powercommons.org
screen /dev/ttyUSB1 115200

Detach from screen: Ctrl-A D Reattach: screen -r

Via LiteX Terminal

ssh fpga-dev-01.uo.powercommons.org
litex_term /dev/ttyUSB1

File Transfer

Upload bitstream

scp microwatt.bit fpga-dev-01.uo.powercommons.org:~/bitstreams/

Download logs

scp fpga-dev-01.uo.powercommons.org:~/logs/boot.log ./

Build on Remote Systems

Systems have full development environment:

ssh fpga-dev-01.uo.powercommons.org

# Clone and build
git clone https://codeberg.org/PowerCommons/microwatt-vcu118
cd microwatt-vcu118
make

# Program directly
make program

Note: Builds use shared resources. Large synthesis jobs limited to off-peak hours (6 PM - 8 AM Pacific).

Monitoring System Status

Check FPGA Status

# List connected FPGAs
lsusb | grep Xilinx

# Check programming
dmesg | tail

Check Resource Usage

# CPU/Memory
htop

# Disk space
df -h

View Other Users

who

Be courteous - if system is busy, defer long builds.

Scheduling

Reserve Time Slots

Use web interface:

https://schedule.powercommons.org

1. Login with Codeberg credentials
2. Select board and time slot
3. Max 4 hours per session
4. Can reserve up to 7 days in advance

Adhoc Use

If no reservation, first-come first-served. Check:

# See active reservations
cat /etc/motd

Common Tasks

Run Synthesis

cd ~/projects/my-design
vivado -mode batch -source synth.tcl

# Builds run in background
nohup vivado -mode batch -source synth.tcl &> synth.log &

Boot Linux

# Program FPGA
make program-fpga

# Connect serial
screen /dev/ttyUSB1 115200

# Load kernel via litex_term
litex_term --kernel=zImage /dev/ttyUSB1

Run Tests

cd ~/microwatt-tests
./run_all_tests.sh

Storage

Home Directory

• Quota: 50GB per user
• Backup: Daily (7-day retention)
• Location: /home/your-username

Shared Resources

• Bitstreams: /shared/bitstreams/
• Kernels: /shared/kernels/
• Tools: /shared/tools/

All users can read, only admins can write.

Rules and Etiquette

1. Don’t leave FPGAs programmed - Reset when done
2. Kill background processes - Clean up after yourself
3. Respect time limits - 4 hours max per session
4. Report issues - Email admin if hardware problems
5. Be nice - Shared resource, be considerate

Troubleshooting

VPN Won’t Connect

Check credentials:

cat powercommons-uo.ovpn | grep auth-user-pass

Test connectivity:

ping 10.40.0.1  # VPN gateway

SSH Connection Refused

1. Ensure VPN is connected
2. Check SSH port: ssh -p 22 -v user@host
3. Verify username/key

FPGA Not Detected

lsusb | grep Xilinx

If not shown:

1. Power cycle board (contact admin)
2. Check cable connections (contact admin)

Permission Denied on /dev/ttyUSB*

sudo usermod -a -G dialout $USER
# Logout and login

Support

System issues:

• Email: [email protected]

General help:

• Matrix: #powercommons:matrix.org

Emergency (system down):

• Status page: status.powercommons.org